电子学报 ›› 2019, Vol. 47 ›› Issue (9): 1868-1874.DOI: 10.3969/j.issn.0372-2112.2019.09.008

• 学术论文 • 上一篇    下一篇

基于近似计算技术的FPRM电路面积优化

王伦耀, 夏银水, 储著飞   

  1. 宁波大学信息科学与工程学院, 浙江宁波 315211
  • 收稿日期:2018-04-09 修回日期:2019-03-28 出版日期:2019-09-25
    • 作者简介:
    • 王伦耀 男,1972年生于浙江宁波.宁波大学信息科学与工程学院教授.研究方向为低功耗集成设计、集成电路设计自动化等.E-mail:wanglunyao@nbu.edu.cn;夏银水 男,1963年生于浙江余姚.宁波大学信息科学与工程学院教授.研究方向为低功耗集成设计、物联网芯片设计、集成电路设计自动化等;储著飞 男,1986年生于安徽潜山.宁波大学信息科学与工程学院副教授.研究方向为集成电路设计自动化、低功耗集成电路设计等.
    • 基金资助:
    • 国家自然科学基金 (No.61471211,No.U1709218,No.61871242); 浙江省自然科学基金 (No.LY19F040004)

Area Optimization of FPRM Circuits Using Approximate Computing

WANG Lun-yao, XIA Yin-shui, CHU Zhu-fei   

  1. Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, Zhejiang 315211, China
  • Received:2018-04-09 Revised:2019-03-28 Online:2019-09-25 Published:2019-09-25
    • Supported by:
    • National Natural Science Foundation of China (No.61471211, No.U1709218, No.61871242); National Natural Science Foundation of Zhejiang Province,  China (No.LY19F040004)

摘要: 近似计算技术通过降低电路输出精度实现电路功耗、面积、速度等方面的优化.本文针对RM(Reed-Muller)逻辑中"异或"运算特点,提出了基于近似计算技术的适合FPRM逻辑的电路面积优化算法,包括基于不相交运算的RM逻辑错误率计算方法,及在错误率约束下,有利于面积优化的近似FPRM函数搜索方法等.优化算法用MCNC(Microelectronics Center of North Carolina)电路进行测试.实验结果表明,提出的算法可以处理输入变量个数为199个的大电路,在平均错误率为5.7%下,平均电路面积减少62.0%,并在实现面积优化的同时有利于实现电路的动态功耗的优化且对电路时延影响不大.

关键词: 近似计算, RM函数, 固定极性, 逻辑优化

Abstract: Approximate computing is a novel way in logic circuit design which offers the savings of the power,area and delay at cost of reduced accuracy. This paper focused on the fixed-polarity Reed-Muller(RM) functions area optimization by using approximate computing technique which is different from those used in traditional Boolean functions optimization in term of the characteristic of "XOR" in RM functions. The proposed algorithm mainly consists of the method of the error rate computing of RM functions using disjointed products and the approach of the approximate FPRM functions searching for less area under the given error rate constraint. The proposed algorithm is tested under MCNC (Microelectronics Center of North Carolina) benchmarks.The experimental results show that it can deal with the large function with 199 inputs. And by using the approximate computing technique,the average area can be reduced by 62.0% with the average error rate of 5.7%. The proposed approximate computing technique based algorithm is also beneficial for dynamic power saving and has little effect on the delay while optimizing the area of a circuit.

Key words: approximate computing, Reed-Muller functions, fixed-polarity, logic optimization

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