基于边沿延时翻转的绑定前硅通孔测试方法

doi:10.3969/j.issn.0372-2112.2019.11.006

电子学报 ›› 2019, Vol. 47 ›› Issue (11): 2278-2283.DOI: 10.3969/j.issn.0372-2112.2019.11.006

基于边沿延时翻转的绑定前硅通孔测试方法

倪天明¹, 常郝², 卞景昌³, 易茂祥³, 梁华国³, 黄正峰³

1. 安徽工程大学电气工程学院, 高端装备先进感知与智能控制教育部重点实验室, 安徽芜湖 241000;
2. 安徽财经大学计算机科学与技术系, 安徽蚌埠 233030;
3. 合肥工业大学电子科学与应用物理学院, 安徽合肥 230009

收稿日期:2019-01-18 修回日期:2019-03-04 出版日期:2019-11-25
- 通讯作者:
- 黄正峰
- 作者简介:
- 倪天明 男,1991年10月出生于安徽无为县,2018年在合肥工业大学获得工学博士学位,现为安徽工程大学电气工程学院讲师,主要研究方向为3D芯片测试与容错技术、容错计算等.E-mail:timmyni126@126.com;常郝男,1983年9月生于安徽寿县,分别于2007、2015年在合肥工业大学获得工学硕士、工学博士学位,现为安徽财经大学管理科学与工程学院计算机科学与技术系副教授,硕士生导师,主要研究方向为3D IC测试技术、内建自测试(BIST)、容错计算等.E-mail:007changhao@163.com
- 基金资助:
- 国家自然科学基金 (No.61904001,No.61874156,No.61704001); 安徽省自然科学基金 (No.1908085QF272,No.1808085QF196; 安徽省教育厅高校自然科学研究重点项目 (No.KJ2019A0163,No.KJ2016A001); 安徽工程大学科研启动基金 (No.2018YQQ007)

An Edge Transition Delay Based Pre-Bond TSV Testing Method

NI Tian-ming¹, CHANG Hao², BIAN Jing-chang³, YI Mao-xiang³, LIANG Hua-guo³, HUANG Zheng-feng³

1. Key Laboratory of Advanced Perception and Intelligent Conerol of High-end Eguipment, Ministry of Education, College of Electrical Engineering, Anhui Polytechnic University, Wuhu, Anhui 241000, China;
2. Department of Computer Science and Technvtogy, Anhui University of Finance and Economics, Bengbu, Anhui 233030, China;
3. School of Electronic Science and Applied Physics, Hefei University of Technology, Hefei, Anhui 230009, China

Received:2019-01-18 Revised:2019-03-04 Online:2019-11-25 Published:2019-11-25
- Corresponding author:
- HUANG Zheng-feng
- Supported by:
- National Natural Science Foundation of China (No.61904001, No.61874156, No.61704001); Natural Science Foundation of Anhui Province (No.1908085QF272, No.1808085QF196; Key Program of Natural Science Research Project for Anhui Universities (No.KJ2019A0163, No.KJ2016A001); Research Fund of Anhui Engineering University (No.2018YQQ007)

摘要/Abstract

摘要： 硅通孔（Through-Silicon Via，TSV）在制造过程中发生开路和短路等故障会严重影响3D芯片的可靠性和良率，因此对绑定前的TSV进行故障测试是十分必要的.现有的绑定前TSV测试方法仍存在故障覆盖不完全、面积开销大和测试时间大等问题.为解决这些问题，本文介绍一种基于边沿延时翻转的绑定前TSV测试技术.该方法主要测量物理缺陷导致硅通孔延时的变化量，并将上升沿和下降沿的延时分开测量以便消除二者的相互影响.首先，将上升沿延时变化量转化为对应宽度的脉冲信号；然后，通过脉宽缩减技术测量出该脉冲的宽度；最后，通过触发器的状态提取出测量结果并和无故障TSV参考值进行比较.实验结果表明，本文脉宽缩减测试方法在故障测量范围、面积开销等方面均有明显改善.

关键词: 3D芯片, 硅通孔测试, 开路故障, 短路故障

Abstract: Through-Silicon Via (TSV) is prone to introduce resistive open and leakage faults during the manufacturing process, which will seriously affect the reliability and yield of 3D chips, so the pre-bond TSV testing seems necessary. Existing pre-bond TSV testing methods still have some problems, such as incomplete fault coverage,large area overhead and large testing time. To tackle these problems, an edge transition delay based pre-bond TSV testing method is proposed in this paper. This method mainly measures the variation of TSV delay caused by physical defects, and separates the rising and falling edges to eliminate the interaction between them. Firstly, the variation of rise-time delay is transformed into a pulse signal with corresponding width; then, the pulse width is measured by pulse width reduction technology; finally, the measurement results are extracted by the state of trigger and compared with the reference value of fault-free TSV. The experimental results show that the proposed method performs better than the existing methods in terms of fault coverage,and area overhead.

Key words: 3D Chip, TSV(Through-Silicon Via)testing, open fault, leakage fault

中图分类号:

TP306.2

倪天明, 常郝, 卞景昌, 等. 基于边沿延时翻转的绑定前硅通孔测试方法[J]. 电子学报, 2019, 47(11): 2278-2283.

NI Tian-ming, CHANG Hao, BIAN Jing-chang, et al. An Edge Transition Delay Based Pre-Bond TSV Testing Method[J]. Acta Electronica Sinica, 2019, 47(11): 2278-2283.

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基于边沿延时翻转的绑定前硅通孔测试方法

An Edge Transition Delay Based Pre-Bond TSV Testing Method

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