电子学报 ›› 2020, Vol. 48 ›› Issue (2): 314-320.DOI: 10.3969/j.issn.0372-2112.2020.02.014

• 学术论文 • 上一篇    下一篇

3D NAND闪存数据保持力与初始状态依赖性研究

张明明1,2,3, 王颀1,2,3, 井冲3, 霍宗亮1,2,3   

  1. 1. 中国科学院大学微电子学院, 北京 100049;
    2. 中国科学院微电子研究所, 北京 100029;
    3. 长江存储科技有限公司, 湖北武汉 201203
  • 收稿日期:2019-06-11 修回日期:2019-09-26 出版日期:2020-02-25 发布日期:2020-02-25
  • 通讯作者: 霍宗亮
  • 作者简介:张明明 男,1993年10月出生,河南安阳人.现为中国科学院大学微电子学院研究生,主要研究方向为3D NAND闪存失效方向及数据保持力特性.E-mail:zhangmingming17@mails.ucas.edu.cn;王颀 男,上海人,中国科学院微电子所研究员,博士生导师.研究方向为新型纳米存储器件与集成技术、存储器纠错技术研究.E-mail:wangqi1@ime.ac.cn;井冲 男,1980年出生,上海人,硕士学位.长江存储科技有限公司资深工程师,产品经理.研究方向3D NAND闪存失效模型及测试工程.E-mail:Tonie_Jing@ymtc.com
  • 基金资助:
    国家科技重大专项(No.2017ZX02301002)

Investigation of the Data Retention Initial State Dependence in 3D NAND Flash Memory

ZHANG Ming-ming1,2,3, WANG Qi1,2,3, JING Chong3, HUO Zong-liang1,2,3   

  1. 1. School of Microelectronics, University of Chinese Academy of Sciences, Beijing 100049, China;
    2. Institute of Microelectronics of the Chinese Academy of Sciences, Beijing 100029, China;
    3. Yangze Memory Technologies Company, Wuhan, Hubei 201203, China
  • Received:2019-06-11 Revised:2019-09-26 Online:2020-02-25 Published:2020-02-25

摘要: 数据保持力是NAND闪存重要的可靠性指标,本文基于用户在使用模式下,通过设计测试方法,研究了电荷捕获型3D NAND闪存初始阈值电压-2V至3V的范围内数据保持力特性.结果表明初始状态为编程态时,可以有效降低NAND闪存高温数据保留后的误码率,特别是随着擦写次数的增加,不同初始状态下电荷捕获型3D NAND闪存数据保持力差异更加明显,结论表明闪存最适宜存放的状态为0-1V,电荷捕获型3D NAND闪存器件应避免长期处于深擦除状态.并基于不同初始状态闪存高温数据保留后的数据保持力特性不同的现象进行了建模和演示,通过设计实验验证,机理解释模型符合实验结果.该研究可为电荷捕获型3D NAND闪存器件的长期存放状态提供理论参考.

关键词: 数据保持力, 初始状态, 误码率, 机理模型, 3D NAND

Abstract: Data retention is an important reliability characteristic of NAND flash memory.Based on the user mode, this paper studies the data retention characteristics of charge trapping 3D NAND flash memory under different initial conditions.The results show that device programmed can effectively reduce the bit error rate after high-temperature data retention of NAND flash memory.Especially with the increase of the number of erasing and writing, the data retention of charge-trapping 3D NAND flash memory is more obvious under different initial conditions.The result shows that the flash memory is most suitable for storage 0-1V, charge-trapping 3D NAND flash devices should avoid long-term deep erase conditions.In addition, modeled and demonstrated based on the phenomenon the threshold voltage offset after the high-temperature data retention of the flash memory is increased when initial state is erase state.Through the design experiment, the mechanism factor model accords with the experimental result.This study provides a theoretical reference for the long-term storage of charge-trapping 3D NAND flash devices.

Key words: data retention, bit error rate, read margin, mechanism model, 3D NAND

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