综述:面向SoC-FPGA的开源处理器

doi:10.3969/j.issn.0372-2112.2018.04.030

摘要/Abstract

摘要： 近年来，随着各种IP核的广泛应用，SoC-FPGA的应用领域也随之日益扩展.处理器作为SoC-FPGA的核心IP，其对系统性能的影响至关重要.使用开源处理器IP能大幅度提高SoC-FPGA系统级设计的效率，已成为现在项目开发中常用的手段.本文研究了现有的绝大多数开源处理器的关键技术指标，从可用性和稳定性上提出了一种选择开源处理器的方法.根据该方法，选择出一些具有高可用性和稳定性的开源处理器.最后，利用不同厂商提供的FPGA EDA工具将所述的开源处理器进行了综合与实现，并与现有FPGA厂商提供的商用软核Nios Ⅱ和Microblaze进行了比较和讨论.

关键词: 处理器, FPGA, SoC-FPGA, 开源, 应用, 综述, 概述

Abstract:

With the increasing deployments in IP Cores in FPGA applications, SoC-FPGA systems have been gaining wide popularity in recent years. Processor is no doubt the heart of a SoC-FPGA system, and has a critical impact on overall system performance. The utilization of open source processor IPs can greatly improve working efficiency and reduce the development cycle of SoC-FPGA systems, and it has been gaining favor as a commonly adopted design methodology. This paper investigates the key technical indicators of existing open-core projects, and provides an overview of open source processors. The major features of open source processors are summarized in terms of usability and stability, and the authors propose a methodology to choose appropriate processors for specific applications. Following these guidelines, some open source processors are selected and implemented on Stratix V and Virtex-7 FPGA platforms using corresponding EDA tools. The implementation results are compared and discussed.

Key words: processors, FPGA, SoC-FPGA, open source, applications, survey, overview

中图分类号:

TP393

余乐, 李任伟, 王瑶, 等. 综述:面向SoC-FPGA的开源处理器[J]. 电子学报, 2018, 46(4): 992-1004.

YU Le, LI Ren-wei, WANG Yao, et al. Open Source Processors for SoC-FPGA: A Survey[J]. Acta Electronica Sinica, 2018, 46(4): 992-1004.

参考文献

[1] Melo C A R A,Barros E.Oolong:A baseband processor extension to the RISC-V ISA[A].Proceedings of IEEE International Conference on Application-Specific Systems,Architectures and Processors[C].USA:IEEE,2016.241-242.
[2] Gray J.GRVI phalanx:A massively parallel RISC-V FPGA accelerator[A].Proceedings of IEEE International Symposium on Field-Programmable Custom Computing Machines[C].USA:IEEE,2016.17-20.
[3] 张惠国,王晓玲,等.一种用于FPGA配置的抗干扰维持电路[J].电子学报,2011,39(5):1169-1173. ZHANG Hui-guo,WANG Xiao-ling,et al.Antijamming holding circuit for FPGA configuration cell[J].Acta Electronica Sinica,2011,39(5):1169-1173.(in Chinese)
[4] Christoforos Economakos,et al.Using advanced FPGA SoC technologies for the design of industrial control applications[A].Proceedings of the IEEE 6th International Conference on Information,Intelligence,Systems and Applications (ⅡSA)[C].USA:IEEE,2015.1-6.
[5] Monmasson E,Cirstea M N.FPGA design methodology for industrial control systems-A review[J].IEEE Transactions on Industrial Electronics,2007,54(4):1824-1842.
[6] Sahoo S K,Das G T R,Subrahmanyam V.Contributions of FPGAs to industrial drives:a review[A].Proceedings of the International Conference on Information and Communication Technology in Electrical Sciences (ICTES)[C].UK:IET,2007.343-348.
[7] Jiang W,Gokhale M.Real-Time classification of multimedia traffic using FPGA[A].Proceedings of the International Conference on Field Programmable Logic and Applications[C].USA:IEEE Computer Society,2010.56-63.
[8] Bueno E J,Hernandez A,Rodriguez F J,et al.A DSP-and FPGA-based industrial control with high-speed communication interfaces for grid converters applied to distributed power generation systems[J].IEEE Transactions on Industrial Electronics,2009,56(3):654-669.
[9] Kasik V,Chvostkova Z.FPGA in technical resources of medical imaging[A].Proceedings of the IEEE International Symposium on Applied Machine Intelligence and Informatics[C].USA:IEEE,2013.193-196.
[10] Coric S,Leeser M,Miller E,et al.Parallel-beam backprojection:an FPGA implementation optimized for medical imaging[A].Proceedings of the ACM/SIGDA Tenth International Symposium on Field-Programmable Gate Arrays[C].USA:ACM,2002.217-226.
[11] Jiang R M,Crookes D.FPGA implementation of 3D discrete wavelet transform for real-time medical imaging[A].Proceedings of the European Conference on Circuit Theory and Design[C].USA:IEEE,2007.519-522.
[12] 王晨旭,韩良,等.一种适用于RFID标签的安全化密码算法实现[J].电子学报,2014,42(8):1465-1473. WANG Chen-xu,HAN Liang,et al.A secure cipher implementation suitable for RFID-tags[J].Acta Electronica Sinica,2014,42(8):1465-1473.(in Chinese)
[13] 黄伟,王旭明,等.一种轻小型遥感相机视频处理FPGA软件设计[J].电子学报,2014,42(11):2303-2309. HUANG Wei,WANG Xu-ming,et al.Highly-integrated video processing FPGA software design of a remote sensing camera[J].Acta Electronica Sinica,2014,42(11):2303-2309.(in Chinese)
[14] Hasanzadeh A,Edrington C S,Stroupe N,et al.Real-time emulation of a high-speed microturbine permanent-magnet synchronous generator using multiplatform hardware-in-the-loop realization[J].IEEE Transactions on Industrial Electronics,2014,61(6):3109-3118.
[15] Rui J,Rui C,Yu L C,et al.Low cost 1D DCT core for multiple video codec[J].Chinese Journal of Electronics,2016,25(6):1052-1057.
[16] Zhang C,Li P,Sun G,et al.Optimizing FPGA-based accelerator design for deep convotional neural networks[A].Proceedings of the IEEE/ACM International Symposium on Field-Programmable Gate Arrays (FPGA)[C].USA:IEEE,2015.161-170.
[17] Lee J,Rahman A,Choi K.Efficient FPGA acceleration of convolutional neural networks using logical-3D compute array[A].Proceedings of the IEEE Conference Publications[C].USA:IEEE,2016.1393-1398.
[18] Tredennick N,Shimamoto B.Prospects for reconfigurable systems[J].IEEE Micro,2014,34(1):72-78.
[19] Wilson R.Cpus in fpgas:many faces to a trend (2011)[OL].http://www.edn.com/electronics-news/4369558/CPUs-in-FPGAs-many-faces-to-a-trend.2017-05-31.
[20] Ahmed S Z,Sassatelli G,et al.Survey of new trends in industry for programmable hardware:FPGAs,MPPAs,MPSoCs,structured ASICs,eFPGAs and new wave of innovation in FPGAs[A].Proceedings of the International Conference on Field Programmable Logic and Applications[C].USA:IEEE Computer Society,2010.291-297.
[21] Kuon I,Tessier R,Rose J.FPGA architecture:Survey and challenges[J].Foundations and Trends in Electronic Design Automation,2008,2(2):135-253.
[22] Chen C L P,Zhang C Y.Data-intensive applications,challenges,techniques and technologies:A survey on Big Data[J].Information Sciences,2014,275:314-347.
[23] Ciresan D C,Meier U,Gambardella L M,et al.Deep,big,simple neural nets for handwritten digit recognition[J].Neural Computation,2010,22(12):3207-3220.
[24] Fpgas everywhere-the cloud and mobile[OL].http://www10.edacafe.com/nbc/articles.2017-05-31.
[25] First time ever at acm/sigda conference:Fpgas for mobile apps[OL].http://www.eetimes.com.2017-05-31.
[26] Saleh R,Wilton S,Mirabbasi S,et al.System-on-chip:reuse and integration[J].Proceedings of the IEEE,2006,94(6):1050-1069.
[27] Raveendran A,Patil V B,Selvakumar D,et al.A RISC-V instruction set processor-micro-architecture design and analysis[A].Proceedings of the International Conference on VLSI Systems,Architectures,Technology and Applications[C].USA:IEEE,2016.1-7.
[28] Barthe L,Cargnini L V,Benoit P,et al.Optimizing an open-source processor for FPGAs:a case study[A].Proceedings of the International Conference on Field Programmable Logic and Applications[C].USA:IEEE Computer Society,2011.551-556.
[29] Chen Q,Yi X,Wang M,et al.Design and implementation of IP core for AS5643 serial bus[J].Electronic Measurement Technology,2016,39(3):78-86.
[30] Viseur R.From open source software to open source hardware[A].Open Source Systems:Long-Term Sustainability[C].Berlin Heidelberg:Springer,2012.286-291.
[31] Davidson S.Open-source hardware[J].Design & Test of Computers IEEE,2004,21(5):456-456.
[32] Tong J G,Anderson I D L,Khalid M A S.Soft-core processors for embedded systems[A].Proceedings of the International Conference on Microelectronics[C].USA:IEEE,2006.170-173.
[33] Fletcher B H.FPGA embedded processors[A].Proceedings of the Embedded Systems Conference[C].San Francisco USA:Memec,2005.1-18.
[34] Yiannacouras P,Steffan J G,Rose J.VESPA:portable,scalable,and flexible FPGA-based vector processors[A].Proceedings of the International Conference on Compilers,Architectures and Synthesis for Embedded Systems[C].USA:ACM,2008.61-70.
[35] Yiannacouras P,Steffan J G,Rose J.Exploration and customization of FPGA-based soft processors[J].IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2007,26(2):266-277.
[36] Meng X,Zeng H,Lawal N,et al.Portability analysis of soft microprocessor for FPGA[A].Proceedings of the Embedded Computing[C].USA:IEEE,2012.5-8.
[37] Salgado F,Garcia P,et al.A customizable processor architecture for a design space exploration framework[A].Proceedings of the IEEE International Conference on Industrial Technology[C].USA:IEEE,2012.129-133.
[38] Plavec F.Soft-Core Processor Design[D].Canada:University of Toronto,2004.
[39] Prakash A,Lam S K,Singh A K,et al.Rapid design exploration framework for application-aware customization of soft core processors[A].Proceedings of the International Conference on Field Programmable Logic and Applications[C].USA:IEEE,2009.539-542.
[40] Sheldon D,Vahid F,Lonardi S.Interactive presentation:Soft-core processor customization using the design of experiments paradigm[A].Proceedings of the Design,Automation & Test in Europe Conference & Exhibition[C].USA:IEEE,2007.821-826.
[41] Kamte M G,Bhaskar M P.Design and implementation of reusable processor independent IP core for SoC platform[J].International Journal of Engineering Trends and Technology,2011,5(2):69-72.
[42] Open Design[OL].http://videowiki.root2020.com/index.php?yturl=Open_design.2017-05-31.
[43] Barthe L,Cargnini L V,Benoit P,et al.Optimizing an open-source processor for FPGAs:a case study[A].Proceedings of the International Conference on Field Programmable Logic and Applications[C].USA:IEEE Computer Society,2011.551-556.
[44] The New Site is Still Under Construction (Do Not Worry It Will be Available Soon)[OL].http://www.geocities.ws/jamilkhatib75/.2017-05-31.
[45] 开源硬件简史[OL].http://www.eefocus.com/Kevin/blog/07-06/2238_5cfa2.html/.2017-05-31.
[46] OpenRISC[OL].https://openrisc.io/.2017-05-31.
[47] LEON2 Processor[OL].http://vlsicad.eecs.umich.edu/BK/Slots/cache/www.gaisler.com/products/leon2/leon.html.2017-05-31.
[48] Production Media Networking-Coveloz[OL].https://opencores.org/project,mfpga.2017-05-31.
[49] OCRP-1 Board:Overview[OL].https://opencores.org/project,ocrp-1.2017-05-31.
[50] SoC Interconnection:WISHBONE[OL].http://opencores.org/opencores,wishbone.2017-05-31.
[51] 吴瑞阳,汪文祥,等.龙芯GS464E处理器核架构设计[J].中国科学:信息科学,2015,45(4):480-500. WU Rui-Yang,WANG Wen-Xiang,et al.Design of Loongson GS464E processor architecture[J].Scientia Sinica:Informationis,2015,45(4):480-500.(in Chinese)
[52] 王慧慧.片上共享Cache的参数化设计及验证[D].湖南:国防科技大学,2015.
[53] 北京君正集成电路股份有限公司.北京君正发布新一代65nm XBurst CPU JZ4775[J].集成电路应用,2013,(5):40-40.
[54] 赵雅.北大众志UniCore-Ⅱ处理器中存储管理单元设计与实现[D].北京:北京大学,2007.
[55] 苏州国芯科技有限公司.C~*Core CPU设计技术[J].中国集成电路,2009,18(5):24-25.
[56] 张军.基于CK510嵌入式CPU的32位MCU的RTL设计与验证[D].杭州:杭州电子科技大学,2011.
[57] 张海军,白书敬,尉红梅,唐大国.Java虚拟机在国产申威处理器平台上的移植初探[A].全国高性能计算学术年会(HPC China2011)[C].山东济南,2011.1-7.
[58] OpenCores[OL].http://www.opencores.org/projects.2017-05-31.
[59] Soft Microprocessor[OL].http://.en.wikipedia.org/wiki/Soft_microprocessor.2017-05-31.
[60] CPLD[OL].http://zh.wikipedia.org/zh-cn/CPLD/.2017-05-31.
[61] Fontana R,Kuhn B M,Moglen E,et al.A Legal Issues Primer for Open Source and Free Software Projects V1.5.2[M].Software Freedom Law Center,2008.
[62] OpenCores[OL].https://en.wikipedia.org/wiki/OpenCores.2017-05-31.
[63] Open Source Initiative[OL].http://www.opensource.org//license.2017-05-31.
[64] Help Us Build a Vibrant,Collaborative Global Commons[OL].http://www.creativecommons.org/license.2017-05-31.
[65] Various Licenses and Comments About Them[OL].http://www.en.gnu.org/licenses/licenselist.html.2017-05-31.
[66] Gough B,et al.An Introduction to GCC[M].USA:Network Theory,Ltd,2004.
[67] OSHW Community Survey 2013[OL].http://www.oshwa.org/oshw-community-survey-2013.2017-05-31.
[68] Amber 2 Core Specification[OL].http://opencores.org.2017-05-31.
[69] Amber ARM-Compatible Core:Overview[OL].http://opencores.org/project,amber.2017-05-31.
[70] LatticeMico32 Processor Reference Manual[OL].https://www.yumpu.com/en/document.2017-05-31.
[71] LatticeMico32 Open,Free 32-Bit Soft Processor[OL].http://www.latticesemi.com/en/Products/DesignSoftwareAndIP/IntellectualProperty/IPCore/IPCores02/LatticeMico32.aspx.2017-05-31.
[72] Simply RISC S1 Core Specification[OL].http://www.srisc.com/download.2017-05-31.
[73] OpenSPARC T1 Micro Architecture Specification[OL].http://users.ece.utexas.edu/_mcdermot/vlsi-2.2017-05-31.
[74] OpenSPARC T1 Processor Datasheet[OL].http://read.pudn.com/downloads161/ebook/726659/doc.2017-05-31.
[75] OpenSPARC T1 Processor Megacell Specification[OL].http://read.pudn.com/downloads161/ebook/726659/doc.2017-05-31.
[76] S1 Core:Overview:OpenCores[OL].http://opencores.org/project,s1_core.2017-05-31.
[77] AltOr32-Alternative Lightweight OpenRisc CPU:Overview[OL].http://opencores.org/project,altor32.2017-05-31.
[78] OpenRISC 1000 Architecture Manual[OL].http://www.cl.cam.ac.uk/research/srg/han/ACS-P35/documents.2017-05-31.
[79] OpenRISC 1200 IP Core Specification[OL].http://openrisc.net/or1200-spec.html.2017-05-31.
[80] LEON2 Processor Users Manual[OL].http://www.dit.upm.es/_str/ork/documents.2017-05-31.
[81] Evaluation of the LEON3 Soft-Core Processor Within a Xilinxradiation-Hardened Field-Programmable Gate Array[OL].http://prod.sandia.gov/techlib.2017-05-31.
[82] Aeroflex Gaisler.SPARC V832-bit Processor LEON3/LEON3-FT Companion Core Data Sheet,March,Version 1.1(2010)[OL].http://prod.sandia.gov/techlib.2017-05-31.