电子学报 ›› 2017, Vol. 45 ›› Issue (8): 1873-1881.DOI: 10.3969/j.issn.0372-2112.2017.08.010

• 学术论文 • 上一篇    下一篇

固定边框的多电压布图规划算法

杜世民1,2, 夏银水2, 杨润萍1, 钱利波2   

  1. 1. 宁波大学科学技术学院, 浙江宁波 315211;
    2. 宁波大学信息科学与工程学院, 浙江宁波 315211
  • 收稿日期:2016-08-21 修回日期:2016-12-20 出版日期:2017-08-25 发布日期:2017-08-25
  • 通讯作者: 夏银水
  • 作者简介:杜世民,男,1976年生于浙江东阳.宁波大学科学技术学院副教授,博士.研究方向为集成电路设计自动化、低功耗SoC设计.E-mail:dushimin@nbu.edu.cn
  • 基金资助:
    国家自然科学基金(No.61131001,No.61501268,No.61471211);浙江省自然科学基金(No.LY15F030008)

Fixed-Outline Muti-voltage Floorplanning Algorithm

DU Shi-min1,2, XIA Yin-shui2, YANG Run-ping1, QIAN Li-bo2   

  1. 1. Department of Information Science and Engineering, Ningbo University, Ningbo, Zhejiang 315212, China;
    2. College of Science & Technology, Ningbo University, Ningbo, Zhejiang 315211, China
  • Received:2016-08-21 Revised:2016-12-20 Online:2017-08-25 Published:2017-08-25

摘要: 多电压设计是应对SoC功耗挑战的一种有效方法,但会带来线长、面积等的开销。为减少线长、芯片的空白面积及提高速度,提出了一种改进的固定边框多电压布图方法.对基于NPE(Normalized Polish Expression)表示的布图解,采用形状曲线相加算法来计算其最优的布图实现,并通过增量计算方法来减少计算NPE及多电压分配的时间.为使所得布图解满足给定的边框约束,提出了一个考虑固定边框约束的目标函数,并采用删除后插入(Insertion after Delete,IAD)算子对SA求得布图解进行后优化.实验结果表明,和已有方法相比,所提出方法在线长和空白面积率方面有较明显优势,且所有电路在不同高宽比、不同电压岛数下均实现了极低的空白面积率(< <1%).

关键词: 低功耗, 多电压, 布图规划, 固定边框

Abstract: Multiple Supply Voltage (MSV) design is an effective ways to deal with SoC power challenge,but brings overhead on wirelength area,etc.To reduce wirelength,chip's dead space ratio and improve algorithm speed,an improved fixed outline multi-voltage floorplanning algorithm is proposed.For a given floorplan solution represented by NPE (Normalized Polish Expression),We use the shape curve adding algorithm to calculate its optimal floorplan implementation,and adopt an incremental calculation method in the process of NPE calculation and voltage assignment to reduce runtime.An improved objective function including fixed-outline constraint is proposed,and the IAD (Insertion After Delete) operator is used to post-optimize the obtained floorplan of SA.Experimental results show that compared with the existing methods,our algorithm has advantages on wirelength and dead space ratio,and all circuits achieve extremely low dead space ratio (<<1%) under different aspect ratio and different voltage island number.

Key words: low power, multiple supply voltage, floorplanning, fixed-outline

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