基于约束数据捆绑两相握手协议的8位异步Booth乘法器设计

doi:10.3969/j.issn.0372-2112.2018.04.026

电子学报 ›› 2018, Vol. 46 ›› Issue (4): 961-968.DOI: 10.3969/j.issn.0372-2112.2018.04.026

基于约束数据捆绑两相握手协议的8位异步Booth乘法器设计

何安平¹, 刘晓庆¹, 陈虹²

1. 兰州大学信息科学与工程学院, 甘肃兰州 730000;
2. 清华大学微电子学研究所, 北京 100084

收稿日期:2016-08-11 修回日期:2017-03-21 出版日期:2018-04-25
- 作者简介:
- 何安平 男,兰州大学信息科学与工程学院,获博士学位.研究方向为集成电路设计与形式化分析验证方法,包括异步芯片设计、异步电路系统相对时序分析、集成电路系统形式化分析验证和工具研发.E-mail:heap@lzu.edu.cn;刘晓庆 男,1991年生于山东青岛.兰州大学信息科学与工程学院研究生,研究方向为异步电路设计等.E-mail:liuxq2015@lzu.edu.cn;陈虹女,清华大学电子工程系,获工学博士学位.研究方向极低功耗电路与系统,包括压电陶瓷供电、亚阈值电路设计、异步电路设计及基于多传感器的数据融合技术及图像识别技术等.E-mail:hongchen@tsinghua.edu.cn
- 基金资助:
- 国家自然科学基金 (No.61402121，No.61073193，No.61300230）; 广西高校复杂系统与智能计算机重点实验室基金 (No.2016CSCI05）; 甘肃省重点科技基金 (No.1102FKDA010）; 甘肃省自然科学基金 (No.1107RJZA188）; 甘肃省科技支撑计划 (No.1104GKCA037）

Study of 8-Bit Booth Asynchronous Multiplier Based on Two-Phase Handshake Protocol with Bounded Bundle Data

HE An-ping¹, LIU Xiao-qing¹, CHEN Hong²

1. School of Information Science & Engineering, Lanzhou University, Lanzhou, Gansu 730000, China;
2. Institute of Microelectronics, Tsinghua University, Beijing 100084, China

Received:2016-08-11 Revised:2017-03-21 Online:2018-04-25 Published:2018-04-25
- Supported by:
- National Natural Science Foundation of China (No.61402121, No.61073193, No.61300230); Fund of Guangxi Higher School Key Laboratory of Complex Systems and Intelligent Computing (No.2016CSCI05); Key Science and Technology Fund of Gansu Province (No.1102FKDA010); Natural Science Foundation of Gansu Province (No.1107RJZA188); Science and Technology Support Program of Gansu Province (No.1104GKCA037)

摘要/Abstract

摘要： 以乘法器为代表的算术运算单元是现代数字系统的核心之一，其计算速度在很大程度上影响整个芯片的运算效率.本论文提出了一种改进的Booth乘法算法，其核心思想是先移位、再压缩，最后求和，减少了各模块间的耦合性，有利于控制电路的简化.本论文依据纯异步电路系统的设计方法，采用"约束数据捆绑"两相握手通讯协议的Click微流水线，根据控制和数据处理分离的策略，实现了这种改进算法的8位乘法器，并在FPGA上进行了验证.在45nm工艺制程的FPGA条件下，与相同体系结构的同步乘法器相比，这种异步乘法器在面积和功耗大体相同的情况下，运算速度大体提升超过12倍.

关键词: Booth算法, 异步设计, 两相约束数据捆绑握手协议, Click异步控制器, 微流水线

Abstract:

The arithmetic cell, especially the multiplier, is one of the key components of the modern digital systems, which could affect the efficiency of the whole system dramatically. In this article, we propose an extended Booth algorithm, which is different from the traditional one with the strategy of keeping all the partial products during shifting, then compressing and finally summing. This new one could reduce the coupling of each function and simplify the control part of the circuit. Moreover, by following the asynchronous design methodology, the control circuit with the Click based asynchronous micro pipeline that obeys a two-phase handshake protocol with "bounded bundle data" is implemented. With the policy of isolating data processing from control, an 8-bit asynchronous multiplier is designed and then implemented with FPGA. With the FPGA of 45nm technology and the same architecture, this asynchronous Booth multiplier is over 12 times faster than the synchronous one while keeping the area and power almost same.

Key words: Booth algorithm, asynchronous design methodology, two-phase handshake protocol with bounded bundle data, Click based asynchronous controller, micro pipeline

中图分类号:

TN492

何安平, 刘晓庆, 陈虹. 基于约束数据捆绑两相握手协议的8位异步Booth乘法器设计[J]. 电子学报, 2018, 46(4): 961-968.

HE An-ping, LIU Xiao-qing, CHEN Hong . Study of 8-Bit Booth Asynchronous Multiplier Based on Two-Phase Handshake Protocol with Bounded Bundle Data[J]. Acta Electronica Sinica, 2018, 46(4): 961-968.

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基于约束数据捆绑两相握手协议的8位异步Booth乘法器设计

Study of 8-Bit Booth Asynchronous Multiplier Based on Two-Phase Handshake Protocol with Bounded Bundle Data

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