纳米SRAM寄生双极晶体管效应的仿真研究

doi:10.3969/j.issn.0372-2112.2018.10.025

电子学报 ›› 2018, Vol. 46 ›› Issue (10): 2495-2503.DOI: 10.3969/j.issn.0372-2112.2018.10.025

纳米SRAM寄生双极晶体管效应的仿真研究

赵雯^1,2, 郭晓强^1,2, 陈伟², 罗尹虹², 王汉宁³

1. 西安交通大学核科学与技术学院, 陕西西安 710049;
2. 西北核技术研究所强脉冲辐射环境模拟与效应国家重点实验室, 陕西西安 710024;
3. 北京微电子技术研究所, 北京 100076

收稿日期:2016-12-20 修回日期:2017-06-14 出版日期:2018-10-25
- 作者简介:
- 赵雯,女,1987年生于山东新泰.西安交通大学博士研究生,研究方向为电子元器件抗辐射加固.E-mail:zwnint@163.com;郭晓强,男,1981年生于重庆.西安交通大学博士研究生,研究方向为电子元器件抗辐射加固.E-mail:guoxiaoqiang@nint.ac.cn
- 基金资助:
- 国家安全重大基础研究 (No.613224）

Simulation of Parasitic Bipolar Transistor Effect in Nanometric SRAM

ZHAO Wen^1,2, GUO Xiao-qiang^1,2, CHEN Wei², LUO Yin-hong², WANG Han-ning³

1.School of Nuclear Science and Technology, Xi'an Jiaotong University, Xi'an, Shaanxi 710049, China;
2.State Key Laboratory of Intense Pulsed Radiation Simulation and Effect, Northwest Institute of Nuclear Technology, Xi'an, Shaanxi 710024, China;
3.Beijing Microelectronics Technology Institute, Beijing 100076, China

Received:2016-12-20 Revised:2017-06-14 Online:2018-10-25 Published:2018-10-25
- Supported by:
- National Security Major Basic Research Project of China (No.613224)

摘要/Abstract

摘要： 以65nm双阱CMOS（Complementary Metal Oxide Semiconductor）工艺的SRAM（Static Random Access Memory）为研究对象，采用三维数值模拟方法，结合SRAM中晶体管布局和邻近SRAM的相对位置，对寄生双极晶体管效应致纳米SRAM内部节点电势多次翻转的产生机制进行了深入阐述，对寄生双极晶体管效应致纳米SRAM发生MCU（Multiple Cell Upset）的影响因素进行了详细研究.发现寄生双极晶体管效应致SRAM内部节点电势多次翻转源于N阱中两个PMOS漏极电势的竞争过程，竞争过程与寄生双极晶体管效应的强弱相关，需综合考虑PMOS源极与N阱接触的距离、PMOS漏极与N阱的电势差两个因素.在纳米双阱CMOS工艺的SRAM中，PNP寄生双极晶体管效应对MCU起着重要作用.减小阱接触与SRAM单元的距离，可减弱邻近SRAM的寄生双极晶体管效应并降低MCU的发生概率，即使阱接触距离很近，特殊角度的斜入射和高LET（Linear Energy Transfer）值离子入射仍存在触发邻近SRAM的寄生双极晶体管效应并导致MCU的可能.

关键词: 寄生双极晶体管效应, 单粒子多位翻转, 纳米SRAM

Abstract: Considering the transistors distribution in a SRAM and the relative positions of two adjacent SRAMs, the mechanism of multiple upsets in 65nm twin-well CMOS SRAM internal nodes and the impact factors of multiple cell upset induced by parasitic bipolar effect are investigated through 3D TCAD device simulation. It is found that multiple upsets in SRAM internal nodes result from the competition of p⁺-drains in the n-well. The competition depends on the parasitic bipolar effect which is related to the distance between p⁺-source and n-well contact, as well as the electric potential difference between p⁺-drain and n-well. PNP parasitic bipolar transistors play an important role in nanometric twin-well CMOS SRAM. Although reducing the distance between SRAM and n-well contact can weaken parasitic bipolar effect, ions with special incident angles or high linear energy transfers can also trigger the parasitic bipolar effect in adjacent SRAM and induce multiple cell upset.

Key words: parasitic bipolar transistor effect, multiple cell upset, nanometric SRAM

中图分类号:

TN386.1

赵雯, 郭晓强, 陈伟, 等. 纳米SRAM寄生双极晶体管效应的仿真研究[J]. 电子学报, 2018, 46(10): 2495-2503.

ZHAO Wen, GUO Xiao-qiang, CHEN Wei, et al. Simulation of Parasitic Bipolar Transistor Effect in Nanometric SRAM[J]. Acta Electronica Sinica, 2018, 46(10): 2495-2503.

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纳米SRAM寄生双极晶体管效应的仿真研究

Simulation of Parasitic Bipolar Transistor Effect in Nanometric SRAM

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