1 |
REDMON J, FARHADI A. YOLO9000: Better, faster, stronger[C]// IEEE Conference on Computer Vision & Pattern Recognition. Honolulu: IEEE, 2017: 6517-6525.
|
2 |
NAKAHARA H, YONEKAWA H, FUJII T, et al. A lightweight YOLOv2: A binarized CNN with a parallel support vector regression for an FPGA[C]//The 2018 ACM/SIGDA International Symposium. Monterey: ACM, 2018: 31-40.
|
3 |
GUO K, ZENG S, YU J, et al. [DL] A survey of FPGA-based neural network inference accelerators[J]. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2019, 12(1): 1-26.
|
4 |
BAO C, XIE T, FENG W, et al. A power-efficient optimizing framework fpga accelerator based on winograd for yolo[J]. IEEE Access, 2020, 8: 94307-94317.
|
5 |
HUANG Y, SHEN J, WANG Z, et al. A high-efficiency fpga-based accelerator for convolutional neural networks using winograd algorithm[J]. Journal of Physics Conference Series, 2018, 1026: 012019.
|
6 |
YANG A, LI Y, SHU H, et al. An opencl-based FPGA accelerator for compressed YOLOv2[C]//2019 International Conference on Field-Programmable Technology(ICFPT). Tianjin: IEEE, 2019: 235-238.
|
7 |
SHI F, LI H, GAO Y, et al. Sparse Winograd Convolutional Neural Networks on Small-Scale Systolic Arrays[EB/OL]. (2018-10-03)[2020-12-01]. .
|
8 |
武铮,安虹,金旭,等.基于Intel平台的Winograd快速卷积算法研究与优化[J].计算机研究与发展,2019,56(4):825-835.
|
|
WU Z, AN H, JIN X, et al. Research and optimization of Winograd fast convolution algorithm based on Intel platform[J]. Computer Research and Development, 2019, 56(4) ): 825-835. (in Chinese
|
9 |
NGUYEN D T, NGUYEN T N, KIM H, et al. A high-throughput and power-efficient FPGA implementation of YOLO CNN for object detection[J]. IEEE Transactions on Very Large Scale Integration(VLSI) Systems, 2019, 27(8): 1861-1873.
|
10 |
LIAN X, LIU Z, SONG Z, et al. High-performance FPGA-based CNN accelerator with block-floating-point arithmetic[J]. IEEE Transactions on Very Large Scale Integration(VLSI) Systems, 2019, 27(8): 1874-1885.
|
11 |
XIAO Q, LIANG Y, LU L, et al. Exploring heterogeneous algorithms for accelerating deep convolutional neural networks on FPGAs[C]//Design Automation Conference. Austin: IEEE, 2017: 1-6.
|
12 |
ALWANI M, CHEN H, FERDMAN M, et al. Fused-layer CNN accelerators[C]//2016 49th Annual IEEE/ACM International Symposium on Microarchitecture(MICRO). Taipei: IEEE, 2016: 1-12.
|
13 |
BI F, YANG J. Target detection system design and FPGA implementation based on YOLO v2 algorithm[C]//2019 3rd International Conference on Imaging, Signal Processing and Communication(ICISPC). Singapore: IEEE, 2019: 10-14.
|
14 |
ZHANG S, CAO J, ZHANG Q, et al. An FPGA-based reconfigurable CNN accelerator for YOLO[C]//2020 IEEE 3rd International Conference on Electronics Technology (ICET). Chengdu: IEEE, 2020: 74-78.
|
15 |
LU T Y, CHIN H H, WU H I, et al. A very Compact Embedded CNN Processor Design Based on Logarithmic Computing[EB/OL]. (2020-10-13)[2020-12-01]. .
|
16 |
ZHAO R, NIU X, WU Y, et al. Optimizing CNN-based object detection algorithms on embedded FPGA platforms[C]//International Symposium on Applied Reconfigurable Computing. Rennes: Springer, 2017: 255-267.
|
17 |
WAI Y J, MOHD YUSSOF Z BIN, SALIM S I BIN, et al. Fixed point implementation of Tiny-Yolo-v2 using OpenCL on FPGA[J]. International Journal of Advanced Computer Science and Applications, 2018, 9(10): 506-512.
|
18 |
齐延荣. 基于FPGA的深度学习图像识别加速与优化研究[D]. 郑州: 郑州大学, 2021.
|
|
QI Y R. Research on Acceleration and Optimization of Deep Learning Image Recognition Based on FPGA[D]. Zhengzhou: Zhengzhou University, 2021.
|