基于Winograd算法的目标检测加速器设计与优化

doi:10.12263/DZXB.20201371

摘要/Abstract

摘要：

卷积神经网络（Convolutional Neural Networks，CNN）已被广泛应用于图像处理领域.基于CNN的目标检测模型，如YOLO，已被证明在许多应用中是最先进的.CNN对计算能力和内存带宽要求极高，通常需要部署到专用硬件平台，FPGA因其高性能、低功耗和可重配置性成为CNN的有效硬件加速器.以往的基于FPGA的目标检测加速器主要采用传统卷积算法，然而，传统卷积算法的高运算复杂度限制了加速器的性能.基于此，本文设计了一种基于Winograd算法的目标检测加速器.考虑到各模块间的联系，采用模块融合策略融合卷积层和池化层模块，降低数据移动次数，减少片外存储器访问次数，提高加速器整体性能.以YOLO2模型为例，对数据访问模式、池化内核、参数重排序、数据通路优化进行分析设计，并部署在U280板卡上.实验结果表明，量化后mAP降低了0.96%，性能达249.65 GOP/s，是Xilinx官网所给数据的4.4倍.

关键词: 目标检测, FPGA, Winograd算法, 模块融合, YOLO2

Abstract:

Convolutional neural network(CNN) has been widely used in the field of image processing. CNN-based target detection models, such as YOLO, have proven to be the most advanced in many applications. CNN has extremely high requirements for computing power and memory bandwidth, and usually needs to be deployed on a dedicated hardware platform. FPGA has become an effective hardware accelerator for CNN due to its high performance, low power consumption and reconfigurability. In the past, FPGA-based target detection accelerators mainly used traditional convolution algorithms. However, the high computational complexity of traditional convolution algorithms limited the accelerator’s performance. Based on this, this paper designs a target detection accelerator based on Winograd algorithm. Taking into account the connection between the modules, the module fusion strategy is adopted to fuse the convolutional layer and the pooling layer modules to reduce the number of data movement, reduce the number of off-chip memory accesses, and improve the overall performance of the accelerator. Take the YOLO2 model as an example, analyze and design the data access mode, pooled kernel, parameter reordering, and data path optimization, and deploy it on the U280 board. The experimental results show that mAP is reduced by 0.96% after quantification, and the performance reaches 249.65GOP/s, which is 4.4 times the data given by Xilinx official website.

Key words: target detection, FPGA, Winograd algorithm, module integration, YOLO2

中图分类号:

TP391.41

李斌, 齐延荣, 周清雷. 基于Winograd算法的目标检测加速器设计与优化[J]. 电子学报, 2022, 50(10): 2387-2397.

Bin LI, Yan-rong QI, Qing-lei ZHOU . Design and Optimization of Target Detection Accelerator Based on Winograd Algorithm[J]. Acta Electronica Sinica, 2022, 50(10): 2387-2397.

图/表 21

参考文献 18

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F(4,3)	乘法数
Winograd algorithm	6
Standard algorithm	12
Arithmetic complexity reduction	2x

F(4,3)	乘法数
Winograd algorithm	6
Standard algorithm	12
Arithmetic complexity reduction	2x

	Input Feature	Output Feature	Kernel Size	Winograd algorithm 乘法数	Standard algorithm 乘法数	Non-blocking algorithm乘法数
Conv1	3	544×544	3×3	21307392	42614784	127844352
Conv2	16	272×272	3×3	56819712	113639424	340918272
Conv5	32	136×136	3×3	56819712	113639424	340918272
Conv6	64	68×68	3×3	56819712	113639424	340918272
Conv7	128	68×68	1×1	56819712	113639424	340918272
Conv8	64	68×68	3×3	56819712	113639424	340918272
Conv11	128	34×34	3×3	60162048	120324096	340918272
Conv12	256	34×34	1×1	60162048	120324096	37879808
Conv13	128	34×34	3×3	60162048	120324096	340918272
Conv16	256	17×17	3×3	66846720	133693440	340918272
Conv17	512	17×17	1×1	66846720	133693440	37879808
Conv21	256	17×17	3×3	33423360	66846720	170459136
Conv22	256	17×17	1×1	4177920	8355840	2367488
Total				1125113856	2250227712	4448509952

	Input Feature	Output Feature	Kernel Size	Winograd algorithm 乘法数	Standard algorithm 乘法数	Non-blocking algorithm乘法数
Conv1	3	544×544	3×3	21307392	42614784	127844352
Conv2	16	272×272	3×3	56819712	113639424	340918272
Conv5	32	136×136	3×3	56819712	113639424	340918272
Conv6	64	68×68	3×3	56819712	113639424	340918272
Conv7	128	68×68	1×1	56819712	113639424	340918272
Conv8	64	68×68	3×3	56819712	113639424	340918272
Conv11	128	34×34	3×3	60162048	120324096	340918272
Conv12	256	34×34	1×1	60162048	120324096	37879808
Conv13	128	34×34	3×3	60162048	120324096	340918272
Conv16	256	17×17	3×3	66846720	133693440	340918272
Conv17	512	17×17	1×1	66846720	133693440	37879808
Conv21	256	17×17	3×3	33423360	66846720	170459136
Conv22	256	17×17	1×1	4177920	8355840	2367488
Total				1125113856	2250227712	4448509952

	融合前				融合后
模块	memRead	Conv	maxPool	memWrite	memRead	memWrite
时间/s	0.016 37	0.047 72	0.032 243 46	0.013 35	0.020 12	0.013 35
总时间/s	0.109 683 46				0.033 47