[1] S S Mukherjee,J Emer,S K Reinhardt.The soft error problem:An architectural perspective[A].Proceedings of the 11th International Symposium on High-Performance Computer Architecture[C].Washington,DC,USA:IEEE Computer Society,2005.243-247. [2] J F Ziegler,H W Curtis,H P Muhlfeld,et al.IBM experiments in soft fails in computer electronics (1978-1994)[J].IBM Journal of Research and Development,1996,40(1):3-18. [3] T C May,M H Woods.Alpha-particle-induced soft errors in dynamic memories[J].IEEE Transactions on Electron Devices,1979,26(1):2-9. [4] N Miskov-Zivanov,D Marculescu.Soft error rate analysis for sequential circuits [A].Proceedings of Design,Automation & Test in Europe Conference & Exhibition[C].Nice,France:IEEE Computer Society,2007.1-6. [5] N Miskov-Zivanov,D Marculescu.Modeling and optimization for soft-Error reliability of sequential circuits[J].IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2008,27(5):803-816. [6] H Asadi,M B Tahoori.Soft error modeling and protection for sequential elements [A].Proceedings of 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems[C].Monterey,USA:IEEE Computer Society,2005.463-471. [7] D Holcomb,L Wenchao,S A Seshia.Design as you see FIT:System-level soft error analysis of sequential circuits[A].Proceedings of Design,Automation & Test in Europe Conference & Exhibition[C].Nice,France:IEEE Computer Society,2009.785-790. [8] S J S Mahdavi,K Mohammadi.SCRAP:Sequential circuits reliability analysis program[J].Microelectronics Reliability,2009,49(7):924-933. [9] K Lingasubramanian,S Bhanja.Probabilistic error modeling for sequential logic[A].Proceedings of 7th IEEE Conference on Nanotechnology[C].Hong Kong:IEEE Computer Society,2007.616-620. [10] K Lingasubramanian,S Bhanja.An error model to study the behavior of transient errors in sequential circuits[A].Proceedings of 22nd International Conference on VLSI Design[C].New Delhi,India:IEEE Computer Society,2009.485-490. [11] S Krishnaswamy,G F Viamontes,I L Markov,et al.Accurate reliability evaluation and enhancement via probabilistic transfer matrices[A].Proceedings of IEEE/ACM Conference on Design,Automation and Test in Europe[C].Orlando,USA:IEEE Computer Society,2005.282-287. [12] 王真,江建慧等.基于概率转移矩阵的电路可靠性并行计算方法[J].小型微型计算机系统,2008,29(2):357-360.Z Wang,J H Jiang.Parallel processing of the probabilistic transfer matrix based circuits reliability calculation[J].Journal of Chinese Computer Systems,2008,28(2):357-360.(in Chinese) [13] 王真,江建慧.基于概率转移矩阵的串行电路可靠度计算方法[J].电子学报,2009,37(2):241-247.Z Wang,J H Jiang.A serial method of circuit reliability calculation based on probabilistic transfer matrix[J].Acta Electronica Sinica,2009,37(2):241-247.(in Chinese) [14] V L Levin.Probability analysis of combination systems and their reliability[J].Engin Cybernetics,1996,11(6):78-84. [15] D Cheng.Semi-tensor product of matrices and its application to Morgen's problem[J].Science in China Series F:Information Sciences,2001,44(3):195-212. [16] D Cheng,H Qi,A Xue.A Survey on semi-tensor product of matrices[J].Journal of Systems Science and Complexity,2007,2007(20):304-322. [17] C Ouyang,J Jiang,J Xiao.Reliability evaluation of flip-flops based on probabilistic transfer matrices[A]Proceedings of Proceedings of the 2010 IEEE 16th Pacific Rim International Symposium on Dependable Computing[C].Tokyo,Japan:IEEE Computer Society,2010.239-240. [18] 徐拾义.可信计算系统设计和分析[M].北京:清华大学出版社,2006.S Y Xu.Trusted Computing System Design and Analysis[M].Beijing:TsingHua University Press,2006.(in Chinese) |