电子学报 ›› 2013, Vol. 41 ›› Issue (7): 1371-1377.DOI: 10.3969/j.issn.0372-2112.2013.07.020

• 学术论文 • 上一篇    下一篇

基于哈希表的高效存储器内建自修复方法

郭旭峰, 于芳, 刘忠立   

  1. 中国科学院微电子研究所, 北京 100029
  • 收稿日期:2012-05-04 修回日期:2013-02-27 出版日期:2013-07-25
    • 作者简介:
    • 郭旭峰 男,1983年1月生于黑龙江省哈尔滨市,2006年于北京航空航天大学获得工学学士学位,目前为中国科学院微电子研究所在读博士研究生,主要研究方向为基于LUT结构的FPGA综合工具开发以及存储器内建自修复技术.E-mail:phxwings@yahoo.com.cn;于芳 女,生于1960年,中国科学院微电子研究所研究员、博士生导师,主要研究方向为基于SOI工艺抗辐射集成电路研究与设计,基于LUT结构的FPGA芯片及配套EDA工具开发等.E-mail:yufang@ime.ac.cn
    • 基金资助:
    • "核高基"国家重大科技专项 (No.Y1GZ212002)

An Efficient Memory Built-in Self-Repair Method Based on Hash Table

GUO Xu-feng, YU Fang, LIU Zhong-li   

  1. Institute of Microelectronics of Chinese Academy of Sciences, Beijing 100029, China
  • Received:2012-05-04 Revised:2013-02-27 Online:2013-07-25 Published:2013-07-25
    • Supported by:
    • National Science and Technology Major Project  (NSTMP) Program Kernal Electronic Devices,  High-end General Application Chips,  Fundamental Software Products (No.Y1GZ212002)

摘要: 现有存储器内建自修复方法要么遍历式地址比较效率低,要么并行地址比较功耗高,都不适用于大故障数存储器.对此,本文提出一种高效的存储器内建自修复方法,该方法对占故障主体的单元故障地址以哈希表形式进行存储,以利用哈希表的快速搜索特性提升地址比较效率.本文方法修复后的存储器在1个时钟周期内即可完成地址比较,修复后存储器性能不受任何影响,与目前广泛采用的基于CAM的方法处于同一水平,但功耗方面却具有明显优势.计算机模拟实验表明,对于512×512×8bits的存储器在同等冗余开销的情况下本文方法修复率相对于ESP方法平均提高了32.25%.

关键词: 内建自修复, 哈希表, 内建冗余分析, 内建自测试

Abstract: Existing built-in self-repair (BISR) methods are either inefficient using traversal address compare or high power consumption using parallel address compare.Neither is suitable for memories with large fault quantity.In order to solve this issue,an efficient memory BISR method based on hash table is proposed.In the proposed method cell fault addresses which contribute the main part of memory faults were stored in the form of a hash table.With quick search feature of hash table the proposed method improves address compare efficiency radically.Under work mode address compare process can be finished within 1 clock cycle,and this will ensure repaired memory against additional performance penalty.The proposed method achieves the same address compare efficiency to CAM based method with much lower power consumption.Experimental results show that for 512?512?8 bits memory the proposed method achieves 32.25% repair rate increment on average to ESP method with the same redundancy overhead.

Key words: built-in self-repair, hash table, built-in redundancy analysis, built-in self-test

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