基于跨度和虚拟层的三维芯核测试外壳扫描链优化方法

doi:10.3969/j.issn.0372-2112.2015.03.006

电子学报 ›› 2015, Vol. 43 ›› Issue (3): 454-459.DOI: 10.3969/j.issn.0372-2112.2015.03.006

基于跨度和虚拟层的三维芯核测试外壳扫描链优化方法

刘军^1,2, 吴玺^1,2, 裴颂伟³, 王伟^1,2, 陈田^1,2

1. 合肥工业大学计算机与信息学院, 安徽合肥 230009;
2. 合肥工业大学情感计算与先进智能机器安徽省重点实验室, 安徽合肥 230009;
3. 北京化工大学信息科学与技术学院, 北京 100029

收稿日期:2013-09-24 修回日期:2014-03-09 出版日期:2015-03-25
- 作者简介:
- 刘军 男,1978年2月生于江苏新沂.现为合肥工业大学计算机与信息学院副教授、硕士生导师.主要研究方向为集成电路可测试性设计、测试数据压缩等. E-mail:liujun@ict.ac.cn;吴玺 女,1978年8月生于安徽合肥.现为合肥工业大学计算机与信息学院讲师.主要研究方向为集成电路设计与测试、情感计算. E-mail:wuxi@hfut.edu.cn
- 基金资助:
- 国家自然科学基金 (No.61306049,No.61106037,No.61204046); 国家高技术研究发展计划 (863计划)课题 (No.2012AA011103); 安徽省自然科学基金 (No.1208085QF127); 计算机体系结构国家重点实验室开放课题 (No.CARCH201101)

Wrapper Scan Chains Optimization Based on Span and Virtual Layers for Three Dimensional Cores

LIU Jun^1,2, WU Xi^1,2, PEI Song-wei³, WANG Wei^1,2, CHEN Tian^1,2

1. School of Computer and Information, Hefei University of Technology, Hefei, Anhui 230009, China;
2. Anhui Province Key Laboratory of Affective Computing and Advanced Intelligent Machine, Hefei University of Technology, Hefei, Anhui 230009, China;
3. College of Information Science and Technology, Beijing University of Chemical Technology, Beijing 100029, China

Received:2013-09-24 Revised:2014-03-09 Online:2015-03-25 Published:2015-03-25
- Supported by:
- National Natural Science Foundation of China (No.61306049, No.61106037, No.61204046); Subject of National High-tech R&D Program of China (863 Program) (No.2012AA011103); Natural Science Foundation of Anhui Province (No.1208085QF127); Open Project of State Key Laboratory of Computer Architecture, ICT, CAS (No.CARCH201101)

摘要/Abstract

摘要：

为减少三维芯核绑定前和绑定后的测试时间,降低测试成本,提出了基于跨度和虚拟层的三维芯核测试外壳扫描链优化方法.所提方法首先通过最大化每条测试外壳扫描链的跨度,使得绑定前高层电路和低层电路的测试外壳扫描链数量尽可能相等.然后,在TSVs(Through Silicon Vias)数量的约束下,逐层的将虚拟层中的扫描元素分配到测试外壳扫描链中,以平衡绑定前后各条测试外壳扫描链的长度.实验结果表明,所提方法有效地减少了三维芯核绑定前后测试的总时间和硬件开销.

关键词: 三维嵌入式芯核, 测试外壳扫描链, 跨度, 虚拟层

Abstract:

To reduce test time and test cost for pre-bond and post-bond test of three dimensional embedded cores, this paper proposed an optimization method based on span and virtual layers for wrapper scan chains in three dimensional embedded cores.Firstly, the proposed technique made the number of wrapper scan chains in high layers and low layers as equal as possible by maximizing the span of wrapper scan chains.Then, under the constraints of TSVs(Through Silicon Vias)number, the scan elements contained in virtual layers were assigned to wrapper scan chains layer by layer, which effectively balanced the length of pre-bond and post-bond wrapper chains.Experimental results show the presented methodology can greatly reduce the pre-bond/post-bond test time and hardware overhead for three dimensional embedded cores.

Key words: three dimensional embedded cores, wrapper scan chains, span, virtual layers

中图分类号:

TP306+.2

刘军, 吴玺, 裴颂伟, 等. 基于跨度和虚拟层的三维芯核测试外壳扫描链优化方法[J]. 电子学报, 2015, 43(3): 454-459.

LIU Jun, WU Xi, PEI Song-wei, et al. Wrapper Scan Chains Optimization Based on Span and Virtual Layers for Three Dimensional Cores[J]. Acta Electronica Sinica, 2015, 43(3): 454-459.

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基于跨度和虚拟层的三维芯核测试外壳扫描链优化方法

Wrapper Scan Chains Optimization Based on Span and Virtual Layers for Three Dimensional Cores

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