电子学报 ›› 2016, Vol. 44 ›› Issue (12): 3053-3063.DOI: 10.3969/j.issn.0372-2112.2016.12.034

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3D NoC关键通信部件容错方法研究综述

欧阳一鸣1, 孙成龙1, 陈奇1, 梁华国2, 易茂祥2, 黄正峰2, 闫爱斌2   

  1. 1. 合肥工业大学计算机与信息学院, 安徽合肥 230009;
    2. 合肥工业大学电子科学与应用物理学院, 安徽合肥 230009
  • 收稿日期:2015-05-11 修回日期:2016-03-04 出版日期:2016-12-25
    • 作者简介:
    • 欧阳一鸣,男,1963年生,博士,教授,中国计算机学会高级会员,容错计算专业委员会委员.E-mail:oyymbox@163.com;孙成龙,男,1993生,硕士研究生.E-mail:scl0313@163.com;陈奇,男,1990年生,硕士研究生.E-mail:chenqi_swj@163.com;梁华国,男,1959年生,教授,博士生导师,中国计算机学会容错计算专业委员会委员.E-mail:huagulg@hfut.edu.cn;易茂祥,男,1964年9月出生,博士,教授,IEEE会员,硕士生导师.E-mail:mxyi126@126.com;黄正峰,男,1978年生,博士,副教授,硕士生导师,中国计算机学会容错计算专业委员会委员.E-mail:hanson_hfut@sina.com;闫爱斌,男,1983年生于吉林白城,2015年获得合肥工业大学计算机应用技术专业工学博士学位,现为安徽大学计算机科学与技术学院讲师.研究方向为纳米集成电路软错误率分析和星载系统芯片SoC的抗辐射加固.E-mail:abyan@mail.ustc.edu.cn
    • 基金资助:
    • 国家自然科学基金 (No.61474036,No.61274036,No.61371025,No.61574052); 安徽省自然科学基金 (No.1508085MF117)

Fault-Tolerant Method of Critical Communication Components in 3D NoC: A Review

OUYANG Yi-ming1, SUN Cheng-long1, CHEN Qi1, LIANG Hua-guo2, YI Mao-xiang2, HUANG Zheng-feng2, YAN Ai-bin2   

  1. 1. School of Computer and Information, Hefei University of Technology, Hefei, Anhui 230009, China;
    2. School of Electronic Science & Applied Physics, Hefei University of Technology, Hefei, Anhui 230009, China
  • Received:2015-05-11 Revised:2016-03-04 Online:2016-12-25 Published:2016-12-25
    • Supported by:
    • National Natural Science Foundation of China (No.61474036, No.61274036, No.61371025, No.61574052); Natural Science Foundation of Anhui Province (No.1508085MF117)

摘要:

三维片上网络通过硅通孔(Through Silicon Via,TSV)将多层芯片进行堆叠,具有集成密度大,通信效率高等特点,是片上多核系统的主流通信架构.然而,工艺偏差及物理缺陷所引发的错误和TSV良率较低等因素,使得三维片上网络面临严重的故障问题.为保证通信效率,对三维片上网络关键通信部件进行容错设计必不可少.本文针对三维片上网络关键通信部件——路由器和TSV的故障和容错相关问题,从容错必要性、国内外研究现状、未来的研究方向和关键问题、以及拟提出的相关解决方案四个方面,展开深入探讨.为提高片上网络可靠性、保证系统高效通信提供一体化的解决方案.

关键词: 集成电路, 三维片上网络, 容错, TSV, 路由器加固

Abstract:

3D NoC stacking the multi-chips with TSV has many advantages,such as high integration density and high communication efficiency.It is the mainstream of communication architecture on multi-core on-chip systems.However,due to the process variation,physical defects and low yield of TSV,3D NoC is facing serious fault problems.It is essential to design a fault-tolerant mechanism for 3D NoC to ensure the efficiency of communication.In this paper,we focus on the failure and fault-tolerance issues of the critical communication components (routers and TSVs) in 3D NoC.From the description of fault-tolerance necessity,researches situation at home and abroad,future research directions,key issues and the proposed solutions,we conduct an in-depth discussion.Thus,we provide integrated solutions for improving the reliability of NoC and ensuring efficient communication system.

Key words: integrated circuit, 3D NoC, fault tolerant, through-silicon-via, router reinforcement

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