In order to attain separation of function from structure and separation of computation from communication

we present hierarchical Platform-Based Design (Hi-PBD) method for SoC system design.This method divides SoC system design flow into 3 levels (i.e.system model level

virtual components level and real components level).Hi-PBD performs 2 mappings among the 3 design levels via design planning and virtual-real synthesis.Our method not only reuses the design templates of the 3 levels

but also reuses the mapping results

which increases reusing efficiency.Besides

Hi-PBD boosts up design flexibility through supporting revision at all the 3 levels

and ensures final design target to satisfy performance requirements through performance constraints transmission.Experiments indicate that Hi-PBD method improves SoC high level design efficiency by 30%-40%

and this method achieves platform template reuse ratio by 75%-90%.