Based on the four-event periodic waveform models

we proposed the timing constraints for dynamic gate

LO-CMOS

NTP dynamic gates and N-C

2

MOS.Hybrid timing analysis method was employed to calculate the delay of dynamic circuits.We proposed the delay test waveform generation algorithms for dynamic gates

which taked into account multiple inputs switching.The algorithms have been implemented in SpiceTime and applied to the design of a dynamic 32-bit adder.Without false paths

the error of evaluation delay and precharge delay are within 3.62% and 8.26% respectively.