安徽工业大学电气与信息工程学院,安徽马鞍山 243002
[ "周郁明 男,1971年5月出生,湖北武汉人.安徽工业大学电气与信息工程学院教授,硕士生导师.主要研究方向为新型半导体功率器件的设计及应用.E-mail: ymzhou@ahut.edu.cn" ]
[ "穆世路 男,1996年11月出生,安徽宿州人.安徽工业大学电气与信息工程学院硕士研究生.主要研究方向为宽禁带功率半导体器件的建模及应用.E-mail: 1964007396@qq.com" ]
收稿:2021-08-14,
修回:2022-01-08,
纸质出版:2023-06-25
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周郁明,穆世路,杨华等.Si/SiC混合开关最优门极延时及其在逆变器中的应用[J].电子学报,2023,51(06):1468-1473.
ZHOU Yu-ming,MU Shi-lu,YANG Hua,et al.Optimal Gate Turn-Off Delay-Time of Si/SiC Hybrid Switch and Its Application in Inverter[J].ACTA ELECTRONICA SINICA,2023,51(06):1468-1473.
周郁明,穆世路,杨华等.Si/SiC混合开关最优门极延时及其在逆变器中的应用[J].电子学报,2023,51(06):1468-1473. DOI: 10.12263/DZXB.20211094.
ZHOU Yu-ming,MU Shi-lu,YANG Hua,et al.Optimal Gate Turn-Off Delay-Time of Si/SiC Hybrid Switch and Its Application in Inverter[J].ACTA ELECTRONICA SINICA,2023,51(06):1468-1473. DOI: 10.12263/DZXB.20211094.
由大电流硅绝缘栅双极型晶体管(Silicon Insulated-Gate Bipolar Transistor,Si IGBT)和小电流碳化硅金属-氧化物-半导体场效应晶体管(Silicon Carbon Metal-Oxide-Semiconductor Field-Effect Transistor,SiC MOSFET)并联构成的Si/SiC混合开关具有低成本、高效率的特点.Si/SiC混合开关门极关断延时的控制是提高混合开关效率的关键因素.本文首先研究了在不同工作电流下Si/SiC混合开关关断损耗随门极关断延时的变化,结果表明,Si/SiC混合开关有一个最优的关断延时,此时混合开关的关断损耗最低,并且最优门极关断延时随混合开关工作电流的增大而减小.将所得到的Si/SiC混合开关最优门极关断延时应用在单相全桥逆变器中,实验结果表明,逆变器的转换效率比同等条件下固定关断延时的最高转换效率提高了0.67%.
Si/SiC hybrid switch configured by a high-current silicon insulated-gate bipolar transistor (Si IGBT) and a low-current silicon carbon metal-oxide-semiconductor field-effect transistor (SiC MOSFET) in parallel has the advantages of low cost and high efficiency. The delay time of gate turn-off is the key to improve the efficiency of Si/SiC hybrid switch. In this paper
the relationship between the turn-off power loss and the delay time of gate turn-off for Si/SiC hybrid switch with different working current has been investigated
and the result has shown that there is an optimal delay time of gate turn-off for Si/SiC hybrid switch
with this optimal delay time
Si/SiC hybrid switch can achieve minimum turn-off loss
moreover
the optimal delay time will decrease with the increasing of Si/SiC hybrid switch working current. The optimal delay time of gate turn-off for Si/SiC hybrid switch has been applied to sing-phase full bridge inverter
and the experimental result has indicated that the conversion efficiency of inverter with the optimal delay time of gate turn-off is improved by 0.67% compared with the highest conversion efficiency of inverter with fixed delay time of gate turn-off for Si/SiC hybrid switch.
RAHIMO M , CANALES F , MINAMISAWA R A , et al . Characterization of a silicon IGBT and silicon carbide MOSFET cross-switch hybrid [J]. IEEE Transactions on Power Electronics , 2015 , 30 ( 9 ): 4638 - 4642 .
NING P Q , YUAN T S , KANG Y H , et al . Review of Si IGBT and SiC MOSFET based on hybrid switch [J]. Chinese Journal of Electrical Engineering , 2019 , 5 ( 3 ): 20 - 29 .
DESHPANDE A , LUO F . Practical design considerations for a Si IGBT SiC MOSFET hybrid switch: Parasitic interconnect influences, cost, and current ratio optimization [J]. IEEE Transactions on Power Electronics , 2019 , 34 ( 1 ): 724 - 737 .
LI L , NING P Q , WEN X H , et al . A 1200 V/200 a half-bridge power module based on Si IGBT/SiC MOSFET hybrid switch [J]. CPSS Transactions on Power Electronics and Applications , 2018 , 3 ( 4 ): 292 - 300 .
WANG J , LI Z J , JIANG X , et al . Gate control optimization of Si/SiC hybrid switch for junction temperature balance and power loss reduction [J]. IEEE Transactions on Power Electronics , 2019 , 34 ( 2 ): 1744 - 1754 .
LI Z J , WANG J , DENG L F , et al . Active gate delay time control of Si/SiC hybrid switch for junction temperature balance over a wide power range [J]. IEEE Transactions on Power Electronics , 2020 , 35 ( 5 ): 5354 - 5365 .
LI Z J , WANG J , JI B , et al . Power loss model and device sizing optimization of Si/SiC hybrid switches [J]. IEEE Transactions on Power Electronics , 2020 , 35 ( 8 ): 8512 - 8523 .
QIN H H , WANG R X , XUN Q , et al . Switching time delay optimization for “SiC+Si” hybrid device in a phase-leg configuration [J]. IEEE Access , 2021 , 9 : 37542 - 37556 .
ZHANG Z D , ZHANG L , QIN J C . Optimization of delay time between gate signals for Si/SiC hybrid switch [C]// 2018 IEEE Energy Conversion Congress and Exposition . Portland : IEEE , 2018 : 1882 - 1886 .
PENG Z S , WANG J , LIU Z , et al . Adaptive gate delay-time control of Si/SiC hybrid switch for efficiency improvement in inverters [J]. IEEE Transactions on Power Electronics , 2021 , 36 ( 3 ): 3437 - 3449 .
王强 , 王有政 , 王天施 , 等 . 高效率单相全桥零电流开关谐振极逆变器 [J]. 电子学报 , 2021 , 49 ( 4 ): 788 - 791 .
WANG Q , WANG Y Z , WANG T S , et al . High-efficiency single-phase full-bridge zero-current switching resonant pole inverter [J]. Acta Electronica Sinica , 2021 , 49 ( 4 ): 788 - 791 . (in Chinese)
倪雨 , 李成松 , 沈艳 . 基于最优负载瞬态特性的单相全桥逆变器解耦设计 [J]. 电子学报 , 2017 , 45 ( 4 ): 950 - 958 .
NI Y , LI C S , SHEN Y . Decoupling design of single-phase full-bridge low-frequency inverter based on optimal load dynamic performance [J]. Acta Electronica Sinica , 2017 , 45 ( 4 ): 950 - 958 . (in Chinese)
HE J B , KATEBI R , WEISE N . A current-dependent switching strategy for Si/SiC hybrid switch-based power converters [J]. IEEE Transactions on Industrial Electronics , 2017 , 64 ( 10 ): 8344 - 8352 .
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