1. 合肥工业大学电子科学与应用物理学院,安徽,合肥,230009
2. Department of Computer Science, San Diego State University,CA,San Diego,USA,92182
3. 合肥工业大学计算机与信息学院,安徽,合肥,230009
5. Department of Computer Science San Diego State University San Diego CA USA,92182
纸质出版:2013
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欧阳一鸣, 贺超, 梁华国, 等. NoC架构下异构IP核的并行测试方法[J]. 电子学报, 2013,41(12):2391-2396.
OUYANG Yi-ming, HE Chao, LIANG Hua-guo, et al. Concurrent Testing for Heterogeneous-Cores in Network-on-Chips[J]. Acta Electronica Sinica, 2013, 41(12): 2391-2396.
欧阳一鸣, 贺超, 梁华国, 等. NoC架构下异构IP核的并行测试方法[J]. 电子学报, 2013,41(12):2391-2396. DOI: 10.3969/j.issn.0372-2112.2013.12.011.
OUYANG Yi-ming, HE Chao, LIANG Hua-guo, et al. Concurrent Testing for Heterogeneous-Cores in Network-on-Chips[J]. Acta Electronica Sinica, 2013, 41(12): 2391-2396. DOI: 10.3969/j.issn.0372-2112.2013.12.011.
NoC(Network-on-Chip)中的异构IP核互连架构导致其测试应用时间过长,并行测试技术成为解决这个问题的最佳方案.本文提出了基于NoC架构的异构IP核并行测试方案,实现了异构IP核的高效并行测试.首先利用折叠分区方法将网络分区,提高测试传输并行性,然后通过顺序移位匹配算法将各异构IP核的测试集进行合并,实现测试集的精简和同构化,最后以多播方式将测试数据注入到网络中,实现测试应用的并行.实验结果显示,相比于文献[13,14],本文方法的测试时间减少了17.6%-40.47%,且实现简单.
The test application time becomes too long due to the heterogeneous-core interconnection in Network-on-Chips.The concurrent test technology is the optimal scheme to solve the problem.A novel test project for NoC is proposed in this article
and efficient concurrent test can be achieved in core-based NoC.Firstly
the folding partition method is used to change the network partition
and then it can improve the parallelism of test transmission.Secondly
the test sets are merged through the sequential shift matching algorithm to make them simple and isomorphic.Finally
the test sets are injected into the NoC by multicasting.The experimental results show that the test application time is reduced by 17.6%-40.47% compared with those in the reference[13] and [14]
and our method is implemented easily.
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