To solve the existing problem of the cipher processor

high-efficiency reconfigurable block cipher processor based on stream architecture was proposed.Through the efficient data organization and flexible cipher computing units

the processor that adopts the design conception of hierarchy achieves the cooperation of software and hardware pipeline

develops instruction level parallelism in a block and among multiple blocks and improves the utilization rate of functional units.The processor was simulated and synthesized in 65nm CMOS process.The mapping results of typical block cipher algorithms show that it has high encryption performance both in CBC and ECB mode.Compared with other cryptographic processors

this processor has the advantage of small-area and high-efficiency.