Previous approaches on integrated circuit parametric yield estimation usually model chip performance by pre-setting variation basis functions.It is easy to result in high complexity.On the other hand

random reduction of the number of the basis functions may result in accuracy loss.In order to avoid the issues

a sparse estimation approach for chip-level parametric yield is proposed.Taking power yield as an instance

the proposed approach models leakage power stochastically.Then according to the importance level

several key basis functions are adaptively selected to constribute a sparse leakage power model based on elastic net.Finally according to Bias theory and Markov chain method

the power yield is estimated efficiently.Experimental results show that the proposed approach not only makes the established power model general and sparse

but estimates the power yield accurately.Comparing to Monte Carlo(MC)simulation

the relative errors of power yield estimation based on proposed method are less than 5%.In addition

this approach can lead to a large cost reduction compared with MC simulation

and thus has higher efficiency.