电子学报 ›› 2000, Vol. 28 ›› Issue (1): 39-41.

• 论文 • 上一篇    下一篇

数字HDTV信源解码器的硬件实现

王承宁, 俞斯乐, 李 华, 国澄明   

  1. 天津大学电视与图像信息研究所,天津 300072
  • 收稿日期:1998-09-28 修回日期:1998-12-18 出版日期:2000-01-25 发布日期:2000-01-25

The Hardware Implementation of Digital HDTV Source Decoder

WANG Cheng-ning, YU Si-le, LI Hua, GUO Cheng-ming   

  1. Institute of TV and Image Information,Tianjin University,Tianjin 300072,China
  • Received:1998-09-28 Revised:1998-12-18 Online:2000-01-25 Published:2000-01-25

摘要: 本文提出了一种主要基于FPGA的数字HDTV信源解码器的总体设计方案和硬件实现方法.同时还介绍了整机的测试系统和测试结果.目前,该信源解码器已研制完成,并参加了于1998年9月8日至11日在北京成功进行了我国HDTV功能样机系统的公开演示.

关键词: HDTV, 信源解码器, FPGA, MPEG-2

Abstract: In this paper,the overall scheme and hardware implementation of a digital HDTV source decoder based on FPGA are presented,and the test system and test results are described too.Now,the HDTV source decoder has been completely achieved.It took part in the Chinese HDTV Function Prototype System demo presented successfully in Beijing from Sept 8 to 11 this year.

Key words: HDTV, source decoder, FPGA, MPEG-2

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